Analog and Digital Electronics Design
From Analysis to Synthesis
Nodal Analysis
In this post, we will explore my approach to the nodal analysis method. Although the topic is not necessarily design-oriented, I felt it might be useful to include a post on it since I’ve noticed a significant amount of confusion about it over the years. I hope my presentation may be of use to help clarify the details of nodal analysis.
We’ll begin with a few assumptions. First, we’ll be using Franklin/passive convention:
- Current flows from higher potential (+) to lower potential (-).
- Voltage drops (+ to -) are positive and rises (- to +) are negative.
- Currents leave the positive terminal of a source supplying power and enter the positive terminal of an element dissipating power.
I am going assume knowledge of Kirchhoff’s Current Law (KCL), the definition of a node, and the definition of a reference node.
We’ll now go through the steps. Figure 1 shows a “monster circuit” that contains both voltage and current sources in multiple configurations.
Figure 1. Monster Circuit.
Our first step is to identify, count, and label all nodes. For this circuit, there are five nodes. (Nodes connected by shorts are counted as one node.) We’ll label them \(N_{1}\), \(N_{2}\), \(N_{3}\), and \(N_{4}\), and designate the fifth node at the bottom as the reference, identified by the "ground" symbol. This is shown in Figure 2.
Figure 2. Nodes Identified and Labelled.
We can now start writing equations. For \(N_{1}\), the node voltage is already solved, since there is a voltage source between \(N_{1}\) and ground:
\(V_{N1} = V_{S1}\).
For \(N_{2}\), we’ll use KCL. My first recommendation is to assume \(V_{N2}\) is the highest voltage in the circuit. It may not be, but it’s okay to do so. By making this assumption, all non-source currents can be assumed to be leaving the node and designated positive leaving. This is shown by the green arrows in Figure 3. Consistent adherence to the convention will reveal the true directions when the solution is found. By the way, keep units present when writing the equations; all terms should represent currents.
Figure 3. Currents and Supernode.
The current between \(N_{2}\) and \(N_{1}\) is the difference in the node voltages across the resistance, divided by the resistance. Note, this assumes \(V_{N2}\) is higher than \(V_{N1}\) and thus the current is flowing from \(N_{2}\) to \(N_{1}\):
\(\Large{\frac{V_{N2} – V_{N1}}{R_{1}}}\).
Plus the current between \(N_{2}\) and the reference (ground):
\(\Large{\frac{V_{N2} – V_{N1}}{R_{1}}} + \Large{\frac{V_{N2}}{R_{2}}}\).
Plus the current between \(N_{2}\) and \(N_{3}\) equals 0:
\(\Large{\frac{V_{N2} – V_{N1}}{R_{1}}} + \Large{\frac{V_{N2}}{R_{2}}} + \Large{\frac{V_{N2}-V_{N3}}{R_{3}}}=0\).
Since there is a voltage source between \(N_{3}\) and \(N_{4}\), we’ll have to get one equation in the form of voltages and one treating the two nodes as one supernode. The supernode is indicated by the blue dotted line and the currents leaving the supernode are displayed in red in Figure 3.
For the supernode, the difference of the node voltages between \(N_{3}\) and \(N_{4}\) must equal the source between them:
\(V_{N4} – V_{N3} = V_{S2}\).
KCL applies to regions or subcircuits as well as nodes. The sum of all currents entering the region must equal the sum of all currents leaving the region, or, in other words, the algebraic sum is zero. Assuming all currents are leaving and are positive:
\(\Large{\frac{V_{N3} – V_{N2}}{R_{3}}} + \Large{\frac{V_{N4}}{R_{4}}} - I_{S} + \Large{\frac{V_{N4}}{R_{5}}} = 0.\)
We now have four equations with four unknowns (actually \(V_{N1}\) is now known as \(V_{S1}\)). Two of the equations in this example were generated using KCL and are thus the sum of currents. But we are solving for node voltages! Those two equations are converted to voltage equations by multiplying both sides by the least common multiple of the resistances connected to the respective nodes. We are, in effect, using Ohm's Law and this is the reason I suggest keeping the units when writing the equations. It helps as a check we're constructing the equations correctly.
With the availability of advanced computing tools for solving systems of equations, such as MatLab or Julia, it makes sense to arrange the equations in matrix form: \(W \times v = vc\). \(W\) is a unitless weight matrix derived after multiplying the current equations by the LCM of resistance, \(v\) is the node voltage vector, and \(vc\) is a vector of constant voltages due to sources.
Let's add some numbers to our circuit as an example. Let \(V_{S1}\) = 12 V, \(V_{S2}\) = 4 V, \(I_{S}\) = 1 mA, and all resistors equal to 1 kΩ.
\(N{1}: V_{N1}\) = 12 V
\(N_{2}: (V_{N2} - V_{N1})\) /1 kΩ + \(V_{N2}\) / 1 kΩ + \((V_{N2} - V_{N3})\) / 1 kΩ = 0.
Multiply both sides by 1 kΩ and gather terms:
\(N_{2}\): -\(V_{N1}\) + 3 \(V_{N2}\) - \(V_{N3}\) = 0.
Supernode A: \(V_{4} - V_{3}\) = 4 V.
Supernode A: -\(V_{3} + V_{4}\) = 4 V.
Supernode B: (\(V_{N3} - V_{N2}\)) / 1 kΩ + \(V_{4}\) / 1 kΩ - 1 mA + \(V_{4}\) / 1 kΩ = 0.
Multiply both sides by 1 kΩ and gather terms:
Supernode B: -\(V_{N2}\) + \(V_{N3}\) + 2\(V_{N4}\) = 1 V.
Let's put the equations in matrix form and solve:
\( \begin{bmatrix} 1 & 0 & 0 & 0 \\ -1 & 3 & -1 & 0 \\ 0 & 0 & -1 & 1 \\ 0 & -1 & 1 & 2 \end{bmatrix} \begin{bmatrix} V_{N1} \\ V_{N2} \\ V_{N3} \\ V_{N4} \end{bmatrix} = \begin{bmatrix} 12 V \\ 0 \\ 4 V \\ 1 V \end{bmatrix} \)
Solving the system, we get
\(\begin{bmatrix} V_{N1} \\ V_{N2} \\ V_{N3} \\ V_{N4} \end{bmatrix} = \begin{bmatrix} 12 V \\ 3.625 V\\ -1.125 V \\ 2.875 V \end{bmatrix}\)
As a quick check we can sum voltages around the right loop:
-\(V_{N2} - (V_{N3} - V_{N2})\) - 4 V + \(V_{N4}\) =
-3.625 V - (-1.125 V - 3.625 V) - 4 V + 2.875 = 0 ✓
Looks like a good solution. Hopefully this presentation helped your understanding of nodal analysis. Feel free to ask questions via the questions email: questions(-at-)drdavelivingston(-dot-)com.
Until the next post,
Dr. Dave
21 Oct 2023